1. Field of the Invention
The present invention relates to a leadframe used to manufacture semiconductor devices.
2. Description of the Related Art
FIGS. 3 and 4 show the configuration of a conventional leadframe.
FIG. 3 shows a single conventional leadframe. Normally, a plurality of leadframes are formed in a strip, as shown in FIG. 4. In FIGS. 3 and 4, a reference numeral 1 denotes a leadframe; 2, inner leads; 3, outer leads; 4, a die pad on which a semiconductor element (not shown) is mounted; 5, an outer frame portion of the leadframe 1; 6, hanging leads for connecting the die pad 4 to the outer frame portion 5; and 7, tie bars for preventing offset of the inner leads 2 and for preventing flow of a sealing resin to the outer leads 3 which are not packaged in the molding process.
A reference numeral 8 denotes first positioning holes used for positioning the leadframe 1 with respect to the molding mold, tie bar cutting mold and lead forming mold (these molds being not shown) employed in the molding process, tie bar cutting process and outer lead forming process, respectively. The positioning holes 8 are formed in the outer frame portion 5 of the leadframe 1 at fixed intervals. The first positioning holes 8 are in general circular or elliptical. A reference numeral 9 denotes a resin injecting portion corresponding to a sub runner and a gate (both being not shown) which act as the flow passage of the molding resin in a molding mold. In the resin injecting portion, a plate on which the sealing resin flows extends from the outer frame portion 5 toward the center of the leadframe. A line 10 indicates a sealing line which is the contour of a molded resin which packages the leadframe 1.
A line A in FIGS. 3 and 4 indicates a semiconductor device forming area including the inner leads 2, the outer leads 3, the die pad 4, the hanging leads 6 and the tie bars 7. A plurality of semiconductor device forming areas A are formed in series on a single leadframe strip 1, as shown in FIG. 4. A reference numeral 11 denotes slits for relieving distortion generated by the difference between the coefficient of thermal expansion between the leadframe 1 and of the molded resin when the molded resin is cooled from the molding temperature to room temperature, thereby preventing warpage of the semiconductor device caused by this distortion. The slits 11 are formed at the periphery of the semiconductor device forming areas A of the leadframe 1 except for the resin injecting portion 9, surrounding the semiconductor device forming area A.
To assemble semiconductor devices using the conventional leadframe 1 having the above-described configuration, a semiconductor element (a chip) is first bonded to the die pad 4 using a resin bonding agent or solder. Next, a large number of aluminum pad electrodes provided on the semiconductor element are respectively connected to the inner leads 2 using thin metal wires (not shown) made of gold, copper or aluminum. Thereafter, the leadframe 1 with the attached semiconductor elements thereon is placed in a mold (not shown), and a sealing resin is injected into the closed mold. After the sealing resin has cured, armor processing is performed on the leadframe 1 using a solder plating, and thereafter the tie bars 7 are cut using a tie bar cutting mold. Subsequently, the outer leads 3 are bent in a predetermined shape using a lead forming mold, and at the same time the distal ends of the outer leads 3 are separated from the outer frame portion 5 of the leadframe 1, thereby completing manufacture of semiconductor devices.
As the overall size of the semiconductor devices manufactured using the leadframe having the above-described configuration is increased, which has taken place in recent years, the degree of distortion caused by the difference in the coefficients of thermal expansion of the frame material and the resin is increased. Therefore, this distortion has not been absorbed by the slits 11 alone. This distortion increases warpage and contraction of the outer frame portion 5 of the leadframe 1 separated by the slits 11 and the entirety of the leadframe 1 even when a leadframe 1 provided with the slits is used to manufacture large semiconductor devices. Also, respective amounts of warpage and contraction generated in the central portion and end portion of the leadframe 1 vary. As a result, the positioning accuracy of the outer leads 3 deteriorates in the tie bar cutting process, because the first positioning holes 8 are located in the outer frame portion 5 separated from the rest of the leadframe by the slits 11. This position error may lead to erroneous cutting of the outer leads 3 during cutting of the tie bars 7.